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US Patent 11941533 Compiler for performing zero-channel removal

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
July 29, 2019
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Date of Patent
March 26, 2024
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Patent Application Number
16525469
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Patent Citations
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US Patent 11625585 Compiler for optimizing filter sparsity for neural network implementation configuration
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US Patent 11423289 Accelerator for deep neural networks
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US Patent 11468145 Storage of input values within core of neural network inference circuit
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US Patent 8468109 Architecture, system and method for artificial neural network implementation
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US Patent 9710265 Neural network compute tile
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US Patent 9858636 Configurable convolution engine
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US Patent 10445638 Restructuring a multi-dimensional array
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US Patent 10489478 Configurable convolution engine
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US Patent 10515303 Wavelet representation for accelerated deep learning
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US Patent 10657438 Backpressure for accelerated deep learning
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•••
Patent Inventor Names
Steven L. Teig
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Brian Thomas
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11941533
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Patent Primary Examiner
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Ying Yu Chen
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CPC Code
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G06N 3/04
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G06N 3/063
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G06N 3/08
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G06N 3/105
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