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US Patent 11875866 Memory programming methods and memory systems

Patent 11875866 was granted and assigned to Micron Technology on January, 2024 by the United States Patent and Trademark Office.

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent
1

Patent attributes

Patent Applicant
Micron Technology
Micron Technology
1
Current Assignee
Micron Technology
Micron Technology
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
118758661
Patent Inventor Names
Takafumi Kunihiro1
Date of Patent
January 16, 2024
1
Patent Application Number
165810671
Date Filed
September 24, 2019
1
Patent Citations
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US Patent 7508693 One-time-programmable (OTP) memory device and method for testing the same
1
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US Patent 6985378 Programmable microelectronic device, structure, and system and method of forming the same
1
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US Patent 7218547 ROM embedded DRAM with anti-fuse programming
1
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US Patent 7337282 Memory system and process for controlling a memory component to achieve different kinds of memory characteristics on one and the same memory component
1
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US Patent 9117522 Nonvolatile semiconductor memory device with a write sequence including a setting and removing operation
1
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US Patent 9135978 Memory programming methods and memory systems
1
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US Patent 9165648 Resistive memory devices, circuits and methods having read current limiting
1
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US Patent 9293196 Memory cells, memory systems, and memory programming methods
1
...
Patent Primary Examiner
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Mohammed A Bashar
1
CPC Code
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G11C 16/24
1
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G11C 16/26
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G11C 17/00
1
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G11C 8/12
1
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G11C 16/10
1
Patent abstract

Memory programming methods and memory systems are described. One example memory programming method includes programming a plurality of main cells of a main memory and erasing a plurality of second main cells of the main memory. The memory programming method further includes first re-writing one-time programmed data within a plurality of first one-time programmed cells of a one-time programmed memory during the programming and second re-writing one-time programmed data within a plurality of second one-time programmed cells of a one-time programmed memory during the erasing. Additional method and apparatus are described.

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