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US Patent 11868253 Memory device interface and method

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
1
Date Filed
July 11, 2022
1
Date of Patent
January 9, 2024
1
Patent Application Number
17861627
1
Patent Citations
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US Patent 8069379 Memory system with point-to-point request interconnect
1
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US Patent 8275936 Load reduction system and method for DIMM-based memory systems
1
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US Patent 8543758 Apparatus including memory channel control circuit and related methods for relaying commands to logical units
1
‌
US Patent 8754533 Monolithic three-dimensional semiconductor device and structure
1
‌
US Patent 8984189 Systems, methods, and apparatuses for stacked memory
1
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US Patent 9357649 276-pin buffered memory card with enhanced memory system interconnect
1
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US Patent 9378707 Gamma voltage generation unit and display device using the same
1
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US Patent 9391048 Semiconductor package
1
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US Patent 9489009 System on chip, bus interface and method of operating the same
1
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US Patent 9519315 276-pin buffered memory card with enhanced memory system interconnect
1
•••
Patent Inventor Names
Matthew B. Leslie
1
Owen Fay
1
Chan H. Yoo
1
Roy E. Greeff
1
Brent Keeth
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
11868253
1
Patent Primary Examiner
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Pho M Luu
1
CPC Code
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G11C 2211/4062
1
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G11C 29/12
1
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G11C 11/4093
1
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G06F 12/0215
1

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