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US Patent 11861761 Graphics processing unit processing and caching improvements

Patent 11861761 was granted and assigned to Intel on January, 2024 by the United States Patent and Trademark Office.

Overview Structured Data Issues Contributors Activity

Is a

Patent

Current Assignee

Intel

Date Filed

November 11, 2020

Date of Patent

January 2, 2024

Patent Applicant

Intel

Patent Application Number

17095590

Patent Citations

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US Patent 7197605 Allocating cache lines

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US Patent 6856320 Demand-based memory system for graphics applications

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US Patent 6947049 Method and system for synchronizing updates of vertex data with a graphics processor that is fetching vertex data

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US Patent 7102646 Demand-based memory system for graphics applications

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US Patent 7327289 Data-modifying run length encoder to avoid data expansion

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US Patent 7346741 Memory latency of processors with configurable stride based pre-fetching technique

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US Patent 7873812 Method and system for efficient matrix multiplication in a SIMD processor architecture

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US Patent 8429351 Techniques for determining an amount of data to prefetch

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US Patent 8488055 Flash synchronization using image sensor interface timing signal

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US Patent 9960917 Matrix multiply accumulate instruction

•••

Patent Inventor Names

Altug Koker

Guei-Yuan Lueh

Changliang Wang

Abhishek R. Appu

Vasanth Ranganathan

Lidong Xu

Subramaniam Maiyuran

Joydeep Ray

James Holland

Nikos Kaburlasos

•••

Patent Jurisdiction

United States Patent and Trademark Office

Patent Number

11861761

Patent Primary Examiner

CPC Code

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