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US Patent 11855100 Multilevel semiconductor device and structure with oxide bonding

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Contents

Is a
Patent
Patent
0

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
0
Patent Number
118551000
Patent Inventor Names
Brian Cronquist0
Zvi Or-Bach0
Deepak C. Sekar0
Date of Patent
December 26, 2023
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Patent Application Number
181363350
Date Filed
April 18, 2023
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Patent Citations
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US Patent 8294199 Nonvolatile semiconductor memory device and method for manufacturing the same
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US Patent 8928119 Three dimensional structure memory
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US Patent 8971114 Nonvolatile memory devices and driving methods thereof
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US Patent 9105689 Bonded semiconductor structure with SiGeC layer as etch stop
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US Patent 9172008 Semiconductor light emitting device
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US Patent 9227456 Memories with cylindrical read/write stacks
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US Patent 9230973 Methods of fabricating a three-dimensional non-volatile memory device
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US Patent 9269608 Bonded semiconductor structure with SiGeC/SiGeBC layer as etch stop
0
...
Patent Primary Examiner
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John P. Dulka
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CPC Code
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H01L 24/32
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H01L 25/167
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H01L 25/18
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H01L 27/15
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H01L 24/05
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H01L 24/16
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H01L 21/76254
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H01L 2224/05655
0
...
Patent abstract

A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the integrated circuits include at least one memory circuit, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.

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