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US Patent 11854884 Fully aligned top vias

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
December 15, 2021
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Date of Patent
December 26, 2023
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Patent Application Number
17551531
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Patent Citations
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US Patent 7094669 Structure and method of liner air gap formation
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US Patent 7135398 Reliable low-k interconnect structure with hybrid dielectric
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US Patent 7317253 Cobalt tungsten phosphate used to fill voids arising in a copper metallization process
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US Patent 8299625 Borderless interconnect line structure self-aligned to upper and lower level contact vias
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US Patent 9613861 Damascene wires with top via structures
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US Patent 9953865 Structure and method to improve FAV RIE process margin and electromigration
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US Patent 10020223 Reduced tip-to-tip and via pitch at line end
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US Patent 9960110 Self-enclosed asymmetric interconnect structures
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US Patent 10269634 Semiconductor device having voids and method of forming same
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US Patent 6878615 Method to solve via poisoning for porous low-k dielectric
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•••
Patent Inventor Names
Koichi Motoyama
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Robert Robison
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Nicholas Anthony Lanzillo
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Lawrence A. Clevenger
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Somnath Ghosh
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Christopher J. Penny
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11854884
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Patent Primary Examiner
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Eugene Lee
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CPC Code
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H01L 21/76834
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H01L 23/53295
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H01L 21/76897
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H01L 21/76832
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H01L 23/5226
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