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US Patent 11844212 Semiconductor memory devices
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Patent
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Date Filed
May 19, 2022
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Date of Patent
December 12, 2023
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Patent Application Number
17748261
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Patent Citations
US Patent 8441053 Vertical capacitor-less DRAM cell, DRAM array and operation of the same
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US Patent 8629494 Data storing devices and methods of fabricating the same
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US Patent 8637912 Vertical gate device with reduced word line resistivity
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US Patent 8780602 Integrated circuit self aligned 3D memory array and manufacturing method
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US Patent 9087715 Nonvolatile semiconductor memory device and method of manufacturing the same
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US Patent 9318374 Semiconductor storage device comprising peripheral circuit, Shielding layer, and memory cell array
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US Patent 9385320 Semiconductor storage device and method for manufacturing same
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US Patent 9514792 Semiconductor device having stacked layers
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US Patent 9620512 Field effect transistor with a multilevel gate electrode for integration with a multilevel memory device
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US Patent 9748266 Three-dimensional memory device with select transistor having charge trapping gate dielectric layer and methods of making and operating thereof
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•••
Patent Inventor Names
Kyupil Lee
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Sunghee Han
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Bong-Soo Kim
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Junsoo Kim
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Satoru Yamada
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HyeongSun Hong
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Yoosang Hwang
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Kiseok Lee
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Hui-Jung Kim
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11844212
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Patent Primary Examiner
Thanh T Nguyen
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CPC Code
H01L 27/0688
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H01L 28/60
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H01L 23/53295
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H01L 29/788
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G11C 11/404
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G11C 8/14
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G11C 7/18
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G11C 11/4097
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H01L 28/86
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