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US Patent 11784082 3D semiconductor device and structure with bonding
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Patent
Date Filed
January 1, 2023
Date of Patent
October 10, 2023
Patent Application Number
18092337
Patent Citations
US Patent 8514623 Method of maintaining the state of semiconductor memory having electrically floating body transistor
US Patent 8603888 Variable-resistance material memories, processes of forming same, and methods of using same
US Patent 8611388 Method and system for heterogeneous substrate bonding of waveguide receivers
US Patent 8619490 Semiconductor memory devices
US Patent 8630326 Method and system of heterogeneous substrate bonding for photonic integration
US Patent 8643162 Pads and pin-outs in three dimensional integrated circuits
US Patent 8650516 Methods and systems for computer aided design of 3D integrated circuits
US Patent 8654584 Three-dimensional non-volatile memory devices having highly integrated string selection and sense amplifier circuits therein
US Patent 8679861 Semiconductor chip repair by stacking of a base semiconductor chip and a repair semiconductor chip
US Patent 8736068 Hybrid bonding techniques for multi-layer semiconductor stacks
•••
Patent Inventor Names
Deepak C. Sekar
Zvi Or-Bach
Brian Cronquist
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11784082
Patent Primary Examiner
Brook Kebede
CPC Code
H01L 29/66825
H01L 29/66833
H01L 29/66901
H01L 29/78
H01L 29/7841
H01L 29/7843
H01L 29/66272
H01L 29/7881
H01L 29/792
H01L 29/4236
•••
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