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US Patent 11762788 Memory module with timing-controlled data buffering

Patent 11762788 was granted and assigned to Netlist Inc. on September, 2023 by the United States Patent and Trademark Office.

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
Current Assignee
Netlist Inc.
Netlist Inc.
Date Filed
December 7, 2020
Date of Patent
September 19, 2023
Patent Applicant
Netlist Inc.
Netlist Inc.
Patent Application Number
17114478
Patent Citations
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US Patent 7130952 Data transmit method and data transmit apparatus
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US Patent 7133960 Logical to physical address mapping of chip selects
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US Patent 7133972 Memory hub with internal cache and/or memory access prediction
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US Patent 7149841 Memory devices with buffered command address bus
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US Patent 7167967 Memory module and memory-assist module
‌
US Patent 7181591 Memory address decoding method and related apparatus by bit-pattern matching
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US Patent 7191302 Memory control device for controlling transmission of data signals
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US Patent 7200021 Stacked DRAM memory chip for a dual inline memory module (DIMM)
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US Patent 7225303 Method and apparatus for accessing a dynamic memory device by providing at least one of burst and latency information over at least one of redundant row and column address lines
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US Patent 7227910 Communication device with configurable sigma-delta modulator
•••
Patent Inventor Names
Hyun Lee
Jayesh R. Bhakta
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11762788
Patent Primary Examiner
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Michael Sun

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