US Patent 11710130 False fraudulent correction methods and apparatuses

A computer-implemented method and apparatus are provided to reduce false fraudulent declines of transactions. Payment processor (PP) systems may be provided with a request acceptor and a replacement transaction generator. The request acceptor receives a notification of a decline of a first transaction attempted by a cardholder with a merchant, for allegedly fraudulent, and a request to determine whether the first transaction was falsely identified as fraudulent, and if so, to remedy the first transaction. The replacement transaction generator generates, in response to a determination that the first transaction was falsely identified as fraudulent, and the merchant is a false fraudulent reduction partner merchant, a replacement second transaction to replace the declined first transaction. The replacement second transaction may include a bypass authorization code, and made available to the cardholder to use to transact with the merchant bypassing the declined first transaction.