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US Patent 11700692 Stackable via package and method

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
August 6, 2021
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Date of Patent
July 11, 2023
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Patent Application Number
17395893
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Patent Citations
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US Patent 7372151 Ball grid array package and process for manufacturing same
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US Patent 7459202 Printed circuit board
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US Patent 7548430 Buildup dielectric and metallization process and semiconductor package
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US Patent 7550857 Stacked redistribution layer (RDL) die assembly package
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US Patent 7633765 Semiconductor package including a top-surface metal layer for implementing circuit features
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US Patent 7642133 Method of making a semiconductor package and method of making a semiconductor device
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US Patent 7777351 Thin stacked interposer package
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US Patent 7825520 Stacked redistribution layer (RDL) die assembly package
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US Patent 7960827 Thermal via heat spreader package and method
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US Patent 8115316 Packaging board, semiconductor module, and portable apparatus
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•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11700692
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Patent Primary Examiner
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Jeremy C Norris
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CPC Code
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H05K 1/11
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H05K 1/111
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H05K 1/14
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H05K 3/363
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