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US Patent 11695059 Bottom source/drain etch with fin-cut-last-VTFET

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
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Date Filed
November 4, 2021
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Date of Patent
July 4, 2023
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Patent Application Number
17518649
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Patent Citations
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US Patent 9761727 Vertical FETs with variable bottom spacer recess
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US Patent 9842933 Formation of bottom junction in vertical FET devices
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US Patent 9865705 Vertical field effect transistors with bottom source/drain epitaxy
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US Patent 9935102 Method and structure for improving vertical transistor
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US Patent 10141446 Formation of bottom junction in vertical FET devices
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US Patent 10141448 Vertical FETs with different gate lengths and spacer thicknesses
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US Patent 10217846 Vertical field effect transistor formation with critical dimension control
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US Patent 10236379 Vertical FET with self-aligned source/drain regions and gate length based on channel epitaxial growth process
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US Patent 10249731 Vertical FET with sharp junctions
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US Patent 10439044 Method and structure of fabricating I-shaped silicon germanium vertical field-effect transistors
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•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11695059
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Patent Primary Examiner
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Mohammad M Hoque
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CPC Code
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H01L 29/0847
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H01L 29/7827
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H01L 21/823814
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H01L 29/0653
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H01L 27/092
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H01L 21/823885
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H01L 29/66666
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