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US Patent 11693783 Apparatuses and methods for cache operations
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Is a
Patent
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Current Assignee
Micron Technology
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Date Filed
September 20, 2021
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Date of Patent
July 4, 2023
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Patent Applicant
Micron Technology
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Patent Application Number
17479853
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Patent Citations
US Patent 7406494 Method of generating a cycle-efficient bit-reverse index array for a wireless communication system
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US Patent 7447720 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
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US Patent 7454451 Method for finding local extrema of a set of values for a parallel processing element
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US Patent 7535769 Time-dependent compensation currents in non-volatile memory read operations
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US Patent 7574466 Method for finding global extrema of a set of shorts distributed across an array of parallel processing elements
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US Patent 7663928 Sense amplifier circuit having current mirror architecture
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US Patent 7764558 Hybrid sense amplifier and method, and memory device using same
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US Patent 7187585 Read operation for non-volatile storage that includes compensation for coupling
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US Patent 7196928 Compensating for coupling during read operations of non-volatile memory
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US Patent 7260672 Using data stored in a destructive-read memory
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•••
Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11693783
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Patent Primary Examiner
Ly D Pham
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CPC Code
G06F 12/0871
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G06F 12/0215
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G06F 12/0873
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G06F 12/0893
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G06F 2212/1024
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G06F 2212/1028
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G11C 7/1006
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G11C 11/403
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G11C 11/4091
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G11C 11/4093
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•••
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