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US Patent 11675538 Apparatuses and methods for in-memory operations

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
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Current Assignee
Micron Technology
Micron Technology
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Date Filed
May 24, 2021
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Date of Patent
June 13, 2023
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Patent Applicant
Micron Technology
Micron Technology
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Patent Application Number
17328522
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Patent Citations
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US Patent 7400532 Programming method to reduce gate coupling interference for non-volatile memory
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US Patent 7406494 Method of generating a cycle-efficient bit-reverse index array for a wireless communication system
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US Patent 7447720 Method for finding global extrema of a set of bytes distributed across an array of parallel processing elements
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US Patent 7454451 Method for finding local extrema of a set of values for a parallel processing element
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US Patent 7535769 Time-dependent compensation currents in non-volatile memory read operations
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US Patent 7184346 Memory cell sensing with low noise generation
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US Patent 7187585 Read operation for non-volatile storage that includes compensation for coupling
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US Patent 7196928 Compensating for coupling during read operations of non-volatile memory
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US Patent 7260672 Using data stored in a destructive-read memory
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US Patent 7372715 Architecture and method for NAND flash memory
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•••
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11675538
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Patent Primary Examiner
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Jerome Leboeuf
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CPC Code
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G06F 15/7821
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Y02D 10/00
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G11C 16/06
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G06F 9/223
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G06F 3/0659
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G06F 1/3275
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G06F 3/0604
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G06F 9/30036
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G06F 3/0673
0

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