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US Patent 11657773 Methods for driving electro-optic displays

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Is a
Patent
Patent
0

Patent attributes

Patent Applicant
E Ink Corporation
E Ink Corporation
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Current Assignee
E Ink Corporation
E Ink Corporation
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
116577730
Date of Patent
May 23, 2023
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Patent Application Number
178992830
Date Filed
August 30, 2022
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Patent Citations
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US Patent 7259744 Dielectrophoretic displays
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US Patent 7321459 Image display device and method
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US Patent 7327511 Light modulators
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US Patent 7116318 Backplanes for display applications, and components for use therein
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US Patent 7170670 Electrophoretic medium and display with improved image stability
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US Patent 7193625 Methods for driving electro-optic displays, and apparatus for use therein
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US Patent 7202847 Voltage modulated driver circuits for electro-optic displays
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US Patent 7236291 Particle use for image display media, image display panel using the particles, and image display device
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Patent Primary Examiner
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Brent D Castiaux
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CPC Code
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G09G 2310/06
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G09G 2310/062
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G09G 2310/063
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G09G 3/344
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G09G 2320/0204
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G09G 2320/0209
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G09G 2320/0257
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G09G 2310/068
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A variety of methods for driving electro-optic displays so as to reduce visible artifacts are described. Such methods include (a) applying a first drive scheme to a non-zero minor proportion of the pixels of the display and a second drive scheme to the remaining pixels, the pixels using the first drive scheme being changed at each transition; (b) using two different drive schemes on different groups of pixels so that pixels in differing groups undergoing the same transition will not experience the same waveform; (c) applying either a balanced pulse pair or a top-off pulse to a pixel undergoing a white-to-white transition and lying adjacent a pixel undergoing a visible transition; (d) driving extra pixels where the boundary between a driven and undriven area would otherwise fall along a straight line; and (e) driving a display with both DC balanced and DC imbalanced drive schemes, maintaining an impulse bank value for the DC imbalance and modifying transitions to reduce the impulse bank value.

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