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US Patent 11657262 Processing matrix operations for rate limited systems

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Current Assignee
Lightelligence
Lightelligence
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Date Filed
November 11, 2022
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Date of Patent
May 23, 2023
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Patent Applicant
Lightelligence
Lightelligence
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Patent Application Number
17985482
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Patent Citations
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US Patent 10528321 Block floating point for neural network implementations
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US Patent 7536431 Vector-matrix multiplication
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US Patent 8027587 Integrated optic vector-matrix multiplier
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US Patent 10073817 Optimized matrix multiplication using vector multiplication of interleaved matrix values
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US Patent 10229237 Parallel solution for fully-coupled fully-implicit wellbore modeling in reservoir simulation
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US Patent 10567494 Data processing system, computing node, and data processing method
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11657262
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Patent Primary Examiner
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Elias Desta
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CPC Code
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G06N 3/063
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G06N 20/10
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G06N 3/08
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G06F 17/16
0

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