US Patent 11562908 Dielectric structure to prevent hard mask erosion

A novel dielectric cap structure for VTFET device fabrication is provided. In one aspect, a method of forming a VTFET device includes: patterning fins in a substrate using fin hardmasks, including a first fin(s) and a second fin(s); depositing a liner over the fins and the fin hardmasks; selectively forming first hardmask caps on top of the fin hardmasks/liner over the first fin(s); forming first bottom source and drain at a base of the first fin(s) while the fin hardmasks/liner over the first fin(s) are preserved by the first hardmask caps; selectively forming second hardmask caps on top of the fin hardmasks/liner over the second fin(s); and forming second bottom source and drains at a base of the second fin(s) while the fin hardmasks/liner over the second fin(s) are preserved by the second hardmask caps. A device structure is also provided.