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US Patent 11562249 DNN training with asymmetric RPU devices
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Is a
Patent
Date Filed
May 1, 2019
Date of Patent
January 24, 2023
Patent Application Number
16400674
Patent Citations
US Patent 10248907 Resistive processing unit
US Patent 10387778 Scalable architecture for implementing maximization algorithms with resistive devices
US Patent 10831860 Alignment techniques to match symmetry point as zero-weight point in analog crosspoint arrays
US Patent 10608017 Display device, display module, and electronic device
US Patent 11188826 Scalable architecture for implementing maximization algorithms with resistive devices
US Patent 10134472 Floating gate architecture for deep neural network application
US Patent 10185803 Systems and methods for classifying, prioritizing and interpreting genetic variants and therapies using a deep neural network
Patent Citations Received
US Patent 11922314 Systems and methods for building dynamic reduced order physical models
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11562249
Patent Primary Examiner
Paulinho E Smith
CPC Code
G06N 3/063
G06N 3/049
G06N 3/084
G06N 20/10
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