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US Patent 11520855 Matrix sketching using analog crossbar architectures

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
0
Date Filed
May 15, 2020
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Date of Patent
December 6, 2022
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Patent Application Number
16874819
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Patent Citations
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US Patent 10248907 Resistive processing unit
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US Patent 10325006 Scalable architecture for analog matrix operations with resistive devices
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US Patent 10241971 Hierarchical computations on sparse matrix rows via a memristor array
Patent Inventor Names
Lior Horesh
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Vasileios Kalantzis
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Tayfun Gokmen
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Shashanka Ubaru
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Oguzhan Murat Onen
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Haim Avron
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
11520855
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Patent Primary Examiner
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Jay Hann
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CPC Code
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G06N 3/0635
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G06F 30/392
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G06F 2119/06
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G06F 30/27
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G06F 17/18
0
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G06F 17/16
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G06F 30/373
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G06F 2119/12
0

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