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US Patent 11508605 3D semiconductor memory device and structure
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Is a
Patent
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Date Filed
May 2, 2022
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Date of Patent
November 22, 2022
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Patent Application Number
17734867
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Patent Citations
US Patent 10199354 Die sidewall interconnects for 3D chip assemblies
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Patent Inventor Names
Zvi Or-Bach
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Brian Cronquist
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Deepak C. Sekar
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
11508605
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Patent Primary Examiner
Brook Kebede
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CPC Code
H01L 27/0688
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H01L 27/092
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H01L 27/10
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H01L 27/105
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H01L 27/10802
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H01L 27/10876
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H01L 27/10894
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H01L 27/10897
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H01L 27/11
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H01L 27/1108
0
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