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US Patent 11437396 Semiconductor device
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Patent
Date Filed
September 25, 2020
Date of Patent
September 6, 2022
Patent Application Number
17032128
Patent Citations
US Patent 10319729 Methods and apparatuses with vertical strings of memory cells and support circuitry
US Patent 10651197 3D semiconductor devices including a supporter and methods of forming the same
US Patent 10032787 Three-dimensional semiconductor memory device
US Patent 10115667 Semiconductor device with an interconnection structure having interconnections with an interconnection density that decreases moving away from a cell semiconductor pattern
Patent Citations Received
US Patent 12069861 Memory device with reduced bending stack
0
Patent Jurisdiction
United States Patent and Trademark Office
Patent Number
11437396
Patent Primary Examiner
Allison Bernstein
CPC Code
H01L 27/11573
H01L 27/11582
H01L 27/11565
H01L 27/11563
H01L 27/11578
H01L 27/1157
H01L 29/66833
H01L 29/792
H01L 27/11575
H01L 27/11568
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