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Patent attributes
Patent Applicant
Current Assignee
Patent Jurisdiction
Patent Number
Date of Patent
July 19, 2022
Patent Application Number
16722300
Date Filed
December 20, 2019
Patent Primary Examiner
A method, system, and ASIC chip for comparing a bit error rate (BER) to a forward error correction (FEC) threshold to determine a Q margin for a codeblock; wherein the BER corresponds to the number of errors in a given amount of data; where a codeblock of a FEC corresponds to the given amount of data; wherein the FEC threshold corresponds to the maximum amount of errors per codeblock that the FEC is able to remove per given amount of data; wherein the Q margin corresponds to a difference between the BER and the FEC threshold.
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