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US Patent 11373692 Delay tracking method and memory system

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
1
Date Filed
February 19, 2021
1
Date of Patent
June 28, 2022
1
Patent Application Number
17180554
1
Patent Citations
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US Patent 10642538 Multi-channel memory interface
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US Patent 10141044 Memory interface circuit having signal detector for detecting clock signal
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US Patent 10109341 Memory capable of entering/exiting power down state during self-refresh period and associated memory controller and memory system
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US Patent 10163485 Memory module, memory controller and associated control method for read training technique
‌
US Patent 10438650 Memory device with a signal control mechanism
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US Patent 10964363 Delay tracking method and memory system
Patent Inventor Names
Bo-Wei Hsieh
1
Chia-Yu Chan
1
Jou-Ling Chen
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
11373692
1
Patent Primary Examiner
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Leon Viet Q Nguyen
1
CPC Code
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G11C 11/4076
1
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G11C 11/4093
1
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G11C 11/4096
1
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G06F 13/1621
1
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G11C 11/4099
1
Industry
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