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US Patent 11310169 Network-on-chip topology generation

Patent 11310169 was granted and assigned to ARM Ltd. on April, 2022 by the United States Patent and Trademark Office.

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Is a
Patent
Patent
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Patent attributes

Patent Applicant
ARM Ltd.
ARM Ltd.
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Current Assignee
ARM Ltd.
ARM Ltd.
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
113101690
Patent Inventor Names
Anup Gangwar0
Ravishankar Sreedharan0
Nitin Kumar Agarwal0
Narayana Sri Harsha Gade0
Honnahuggi Harinath Venkata Naga Ambica Prasad0
Date of Patent
April 19, 2022
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Patent Application Number
171520340
Date Filed
January 19, 2021
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Patent Citations
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US Patent 10318243 Integrated circuit design
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US Patent 10042404 Automatic generation of power management sequence in a SoC or NoC
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US Patent 10218580 Generating physically aware network-on-chip design from a physical system-on-chip specification
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US Patent 10484267 Systems and methods for managing multi-layer communication networks
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US Patent 10791045 Virtual channel assignment for topology constrained network-on-chip design
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US Patent 10817627 Network on-chip topology generation
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US Patent 11050672 Network-on-chip link size generation
Patent Primary Examiner
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Naum Levin
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CPC Code
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H04L 45/586
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H04L 41/5022
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H04L 41/0873
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H04L 41/0806
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H04L 41/12
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H04L 45/12
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H04L 43/0894
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H04L 43/0852
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...

The present disclosure provides a computer-based method and system for synthesizing a NoC. Traffic data is determined or received, and a baseline topology is generated or received. For each router in the baseline topology, a number of edge virtual channel (EVC) combinations is determined, the transmittablility of the traffic classes are determined, and, when the traffic classes are not transmittable, the router is identified. A traffic class affinity graph (TCAG) is generated for each identified router. Traffic class combinations are generated for the identified routers based on the TCAGs and EVC combinations. The traffic classes of the identified routers are merged based on the traffic class combinations. A final EVC combination for each identified router is determined based on the merged traffic classes. A final topology is generated based, at least in part, on the merged traffic classes and the final EVC combinations for the identified routers.

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