US Patent 11177273 Nonvolatile memory device including row decoder

A nonvolatile memory device includes a substrate; a memory cell array formed on the substrate in a vertically stacked structure; and a row decoder configured to supply a row line voltage to the memory cell array, the row decoder including a plurality of pass transistors. The row line voltage is supplied through a plurality of row lines connecting the pass transistors to the memory cell array. Each of the row lines includes a wiring line parallel with a main surface of the substrate and a contact perpendicular to the main surface of the substrate. The wiring line of at least one row line among the row lines includes a plurality of conductive lines.