Patent attributes
A non-volatile memory device and an erasing operation method thereof are provided. The non-volatile memory device includes a main memory cell region and a control circuit electrically connected to the main memory cell region. The main memory cell region has a plurality of memory cells. The control circuit is configured to perform an erasing operation on the memory cells, wherein the control circuit is configured to: obtain a current threshold voltage of the memory cell to be erased; calculate a difference between the current threshold voltage and an original threshold voltage to obtain a voltage shift value, wherein the original threshold voltage represents the pre-delivery threshold voltage of the memory cells; adjust an erase verify voltage level according to the voltage shift value; and determine whether the erasing operation is completed according to the adjusted erase verify voltage level.
