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US Patent 11126690 Machine learning architecture support for block sparsity

Patent 11126690 was granted and assigned to Intel on September, 2021 by the United States Patent and Trademark Office.

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Patent
Patent

Patent attributes

Patent Applicant
Intel
Intel
Current Assignee
Intel
Intel
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11126690
Date of Patent
September 21, 2021
Patent Application Number
20190329
Date Filed
March 29, 2019
Patent Citations Received
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US Patent 12130885 Emulating fine-grained sparsity in a systolic array
0
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US Patent 11500962 Emulating fine-grained sparsity in a systolic array
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US Patent 11803736 Fine-grained sparsity computations in systolic array
Patent abstract

This disclosure relates matrix operation acceleration for different matrix sparsity patterns. A matrix operation accelerator may be designed to perform matrix operations more efficiently for a first matrix sparsity pattern rather than for a second matrix sparsity pattern. A matrix with the second sparsity pattern may be converted to a matrix with the first sparsity pattern and provided to the matrix operation accelerator. By rearranging the rows and/or columns of the matrix, the sparsity pattern of the matrix may be converted to a sparsity pattern that is suitable for computation with the matrix operation accelerator.

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