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US Patent 11043259 System and method for in-memory compute

OverviewStructured DataIssuesContributors
Is a
Patent
Patent
Date Filed
April 10, 2020
Date of Patent
June 22, 2021
Patent Application Number
16845644
Patent Citations
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US Patent 10049721 Apparatuses and methods for in-memory operations
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Patent Citations Received
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US Patent 12118328 In-memory bit-serial addition system
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US Patent 11941405 Computational memory
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US Patent 11967954 Majority or minority logic gate with non-linear input capacitors without reset
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US Patent 11985831 Multi-function threshold gate with input based adaptive threshold and with stacked non-planar ferroelectric capacitors
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US Patent 12061969 System and method for energy-efficient implementation of neural networks
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US Patent 12107579 Method for conditioning majority or minority gate
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US Patent 12118330 Low power multiplier with non-linear polar material based reset mechanism with sequential reset
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US Patent 11641205 Reset mechanism for a chain of majority or minority gates having paraelectric material
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US Patent 11290111 Majority logic gate based and-or-invert logic gate with non-linear input capacitors
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US Patent 11290112 Majority logic gate based XOR logic gate with non-linear input capacitors
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•••
Patent Inventor Names
David Wentzlaff
0
Fei Gao
0
Georgios Tziantzioulis
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11043259
Patent Primary Examiner
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Tan T. Nguyen

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