Patent attributes
A power divider capable of implementation in a compact multilayer surface mount component to perform power division/combining with low insertion loss, wide bandwidth, design flexibility and high power handling capabilities. The power divider has a first pair of coupled transmission lines interconnecting the input to the outputs, a second pair of coupled transmission lines interconnecting the output ports to grounded isolation resistors, and a single transmission line interconnecting the second pair of coupled transmission lines. The surface mount implementation is by a first layer supporting the ports, a second layer providing edge coupled lines, a third layer having ground plane, a fourth layer and a fifth layer each supporting one of a pair of broadside coupled lines, a sixth layer with another ground plane, and a seventh layer including a single line interconnecting the broadside coupled lines.
