US Patent 10325836 Integrated circuit with connectivity error detection
Patent 10325836 was granted and assigned to Allegro Microsystems, Llc on June, 2019 by the United States Patent and Trademark Office.
Is a
Current Assignee
Date Filed
July 13, 2018
Date of Patent
June 18, 2019
Patent Applicant
Patent Application Number
16034660
Patent Citations Received
Patent Inventor Names
Nicolas Rigoni
0
Brian Bernier
0
Juan Manuel Cesaretti
0
Patent Jurisdiction
Patent Number
Patent Primary Examiner
Find more entities like US Patent 10325836 Integrated circuit with connectivity error detection
Use the Golden Query Tool to find similar entities by any field in the Knowledge Graph, including industry, location, and more.
By using this site, you agree to our Terms of Service.