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US Patent 10297513 Stacked vertical NFET and PFET

OverviewStructured DataIssuesContributorsActivity
Is a
Patent
Patent
Date Filed
December 29, 2017
Date of Patent
May 21, 2019
Patent Application Number
15858267
Patent Citations
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US Patent 10090204 Vertical FINFET structure and methods of forming same
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US Patent 10141448 Vertical FETs with different gate lengths and spacer thicknesses
Patent Citations Received
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US Patent 11978796 Contact and isolation in monolithically stacked VTFET
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US Patent 11756961 Staggered stacked vertical crystalline semiconducting channels
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US Patent 11769830 Semiconductor devices
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US Patent 11956939 Static random access memory using vertical transport field effect transistors
0
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US Patent 10755937 Vertical transistor having a silicided bottom and method for fabricating thereof
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US Patent 10964603 Hybrid gate stack integration for stacked vertical transport field-effect transistors
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US Patent 10971367 Method for fabricating vertical transistor having a silicided bottom
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US Patent 11075202 Bottom fin trim isolation aligned with top gate for stacked device architectures
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US Patent 11251182 Staggered stacked vertical crystalline semiconducting channels
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US Patent 11678475 Static random access memory using vertical transport field effect transistors
0
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
10297513
Patent Primary Examiner
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Mamadou L Diallo

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