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US Patent 10277105 Method and apparatus for delivering power to semiconductors

Patent 10277105 was granted and assigned to VLT on April, 2019 by the United States Patent and Trademark Office.

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Contents

Is a
Patent
Patent
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Patent attributes

Patent Applicant
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VLT
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Current Assignee
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VLT
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Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
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Patent Number
102771050
Patent Inventor Names
Andrew T. D'Amico0
Patrizio Vinciarelli0
Date of Patent
April 30, 2019
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Patent Application Number
156162880
Date Filed
June 7, 2017
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Patent Citations Received
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US Patent 11984806 Method and apparatus for delivering power to semiconductors
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US Patent 11304297 Panel molded electronic assemblies with integral terminals
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US Patent 11336167 Delivering power to semiconductor loads
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US Patent 11398770 Delivering power to semiconductor loads
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US Patent 11870340 Multi-cell power converter
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US Patent 11876520 Method and apparatus for delivering power to semiconductors
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US Patent 11233447 Method and apparatus for delivering power to semiconductors
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US Patent 10903734 Delivering power to semiconductor loads
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Patent Primary Examiner
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Cassandra Cox
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Patent abstract

A semiconductor package includes a VLSI semiconductor die and one or more output circuits connected to supply power to the die mounted to a package substrate. The output circuit(s), which include a transformer and rectification circuitry, provide current multiplication at an essentially fixed conversion ratio, K, in the semiconductor package, receiving AC power at a relatively high voltage and delivering DC power at a relatively low voltage to the die. The output circuits may be connected in series or parallel as needed. A driver circuit may be provided outside the semiconductor package for receiving power from a source and driving the transformer in the output circuit(s), preferably with sinusoidal currents. The driver circuit may drive a plurality of output circuits. The semiconductor package may require far fewer interface connections for supplying power to the die. Multi-output POL circuits may be used in conjunction with on-chip rail-selection and regulation circuitry to further improve efficiency. A three-stage power conversion system includes off-package, on-package and on-chip conversion stages.

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