Patent attributes
An electrical switch circuit adapted to switch digital, high-speed signals with low power includes a plurality of input buffers each coupled to an input transmission line of a plurality of input transmission lines, wherein each input buffer utilizes a digital inverter; a plurality of output buffers each coupled to an output transmission line of a plurality of output transmission lines, wherein each output buffer utilizes a digital inverter; and a plurality of switches each coupled to an associated input transmission line and an associated output transmission line, wherein each of the input transmission line, the output transmission line, and the plurality of switches are in a single line configuration. For the low power, each of the input buffers, the output buffers, the input transmission lines, and the output transmission lines can be unterminated.