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US Patent 10103065 Gate metal patterning for tight pitch applications
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Patent
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Date Filed
April 25, 2017
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Date of Patent
October 16, 2018
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Patent Application Number
15496610
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Patent Citations Received
US Patent 11393728 Semiconductor device and method of fabricating the same
US Patent 11043495 Integrated circuit semiconductor device and method of manufacturing the same
US Patent 11069580 Method of manufacturing a semiconductor device including a plurality of channel patterns
US Patent 11257815 Work function design to increase density of nanosheet devices
US Patent 11276576 Gate metal patterning to avoid gate stack attack due to excessive wet etching
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US Patent 11664656 ESD protection for integrated circuit devices
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US Patent 11749566 Inner filler layer for multi-patterned metal gate for nanostructure transistor
US Patent 11368016 ESD protection for integrated circuit devices
US Patent 10410933 Replacement metal gate patterning for nanosheet devices
US Patent 10566248 Work function metal patterning for N-P spaces between active nanostructures using unitary isolation pillar
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Patent Inventor Names
Joshua M. Rubin
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Alexander Reznicek
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Junli Wang
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Shogo Mochizuki
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Patent Jurisdiction
United States Patent and Trademark Office
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Patent Number
10103065
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Patent Primary Examiner
Marcos D. Pizarro-Crespo
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