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SK Infrared, LLC SBIR Phase I Award, April 2021

A SBIR Phase I contract was awarded to SK Infrared, LLC in April, 2021 for $49,999.0 USD from the U.S. Department of Defense and United States Air Force.

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Contents

sbir.gov/node/2171557
Is a
SBIR/STTR Awards
SBIR/STTR Awards

SBIR/STTR Award attributes

SBIR/STTR Award Recipient
SK Infrared, LLC
SK Infrared, LLC
0
Government Agency
U.S. Department of Defense
U.S. Department of Defense
0
Government Branch
United States Air Force
United States Air Force
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Award Type
SBIR0
Contract Number (US Government)
FA8649-21-P-13000
Award Phase
Phase I0
Award Amount (USD)
49,9990
Date Awarded
April 19, 2021
0
End Date
July 19, 2021
0
Abstract

SK Infrared LLC (SK-IR) is proposing to develop high performance, high-operating temperature (HOT), mid-wave infrared (MWIR) imagers for the next generation surveillance capabilities in the Air Force (AF). The proposed effort will demonstrate a detector focusing on reducing the size, weight, power, and cost (SWAP-C) of MWIR imaging systems. At the end of Phase II, we will deliver a small format array for integration into Air Force (AF) aircraft systems.  This will demonstrate a high performance III-V interband cascade detector array directly grown on Silicon (Si) using an open-circuit voltage photodetector (VocP) architecture to realize HOT MWIR imaging with a natural path forward to wafer level integration. Three technical innovations will be combined to demonstrate the Si-compatible HOT MWIR imaging. First, a demonstration using the VocP photodetector in open-circuit voltage mode rather than photocurrent mode coupled to the gate of a transistor will enable HOT MWIR sensing. We will utilize this VocP architecture and demonstrate noise-equivalent temperature difference (NETD) of 30 mK at an operating temperature of 170 K which will exceed the NETD of 80 mK for the conventional photodiode (PD) mode. Second, we will demonstrate a high quality MWIR III-V detector grown on a Si substrate, providing an ideal platform for the Si substrate to be bonded to a ROIC wafer. Third, the integration of the III-V detector and VocP architecture by means of single element diodes will be directly bonded to a Si fanout. We will include a backside Through Silicon Via (TSV), which can be wafer bonded to a Si fanout. This will enable scalability of HOT MWIR FPAs.

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