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Glenn A. Auve
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Edits on 15 Dec, 2021
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Golden AI
edited on 15 Dec, 2021
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Patent primary examiner of
US Patent 11169560 Configuration of base clock frequency of processor based on usage parameters
US Patent 11169819 Information handling system (IHS) and method to proactively restore firmware components to a computer readable storage device of an IHS
US Patent 7093055 Data transfer device, semiconductor integrated circuit, and microcomputer
US Patent 7096302 Method and apparatus for accelerating detection of serial bus device speed signals
US Patent 7096305 Peripheral bus switch having virtual peripheral bus and configurable host bridge
US Patent 7099968 System and method for generating bus requests in advance based on speculation states
US Patent 7099969 Dynamic reconfiguration of PCI Express links
US Patent 7099977 Processor interrupt filtering
US Patent 7099979 Single shelf network system capable of providing expansion to a multiple shelf mode
US Patent 7103703 Back to back connection of PCI host bridges on a single PCI bus
US Patent 7103704 Exporting 12C controller interfaces for 12C slave devices using IPMI micro-controller
US Patent RE39284 Method and apparatus for reducing power consumption in a system using power management software capable of placing multiple configurable system devices in a reduced power consumption state
US Patent 7107365 Early detection and grant, an arbitration scheme for single transfers on AMBA advanced high-performance bus
US Patent 7117286 Portable computing device-integrated appliance
US Patent 7124222 Control system and method for a communications interface
US Patent 7124229 Method and apparatus for improved performance for priority agent requests when symmetric agent bus parking is enabled
US Patent 7136948 Status notification apparatus status notification method and status notification program
US Patent 7136954 Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanism
US Patent 7139856 Use of set-by-read and set-by-write registers as semaphores
US Patent 7139857 Method and apparatus for handling interrupts
US Patent 7143219 Multilevel fair priority round robin arbiter
US Patent 7149835 System for extending length of a connection to a USB device
US Patent 7149837 Method of operating combination personal data assistant and personal computing device
US Patent 7152130 Bus system for use with information processing apparatus
US Patent 7155547 Integrally embedded backplane data device and method
US Patent 7155556 Devices and methods for converting remote device formats to host device formats for access to host associated resources
US Patent 7159057 Evaluation chip
US Patent 7162554 Method and apparatus for configuring a peripheral bus
US Patent 7162566 USB-based host-to-host networking method
US Patent 7167938 Data transfer memory
US Patent 7167941 Multi-port device configuration
US Patent 7171507 High latency interface between hardware components
US Patent 7174400 Integrated circuit device that stores a value representative of an equalization co-efficient setting
US Patent 7177964 Multiple removable non-volatile memory cards serially communicating with a host
US Patent 7188203 Method and apparatus for dynamic suppression of spurious interrupts
US Patent 7191273 Method and apparatus for scheduling a resource to meet quality-of-service restrictions
US Patent 7193442 USB 1.1 for USB OTG implementation
US Patent 7194565 Nested removable-removable expansion modules
US Patent 7200702 Mobile device expansion system
US Patent 7203776 Method of data transmission and a transmission and reception device therefor
US Patent 7203783 Electrical host system with expandable optical disk recording and playing device
US Patent 7206879 Systems using mix of packet, coherent, and noncoherent traffic to optimize transmission between systems
US Patent 7206883 Interruption control system and method
US Patent 7206886 Data ordering translation between linear and interleaved domains at a bus interface
US Patent 7209997 Controller device and method for operating same
US Patent 7209999 Expansion device for storage units
US Patent 7216190 Small electronic card with peripheral contacts
US Patent 7216192 Guided configuration of data storage systems
US Patent 7216193 Data transfer device, semiconductor integrated circuit, and microcomputer
US Patent 7219181 Dual use modular PCI/PCI express interface
US Patent 7219183 Switching apparatus and method for providing shared I/O within a load-store fabric
US Patent 7222207 Portable computing device-integrated appliance
US Patent 7222211 Virtual USB flash memory storage device with PCI express interface
US Patent 7222212 Virtual USB card reader with PCI express interface
US Patent 7225289 Virtual IDE storage with PCI express interface
US Patent 7228373 Serial digital communication system and method
US Patent 7231480 Method and system for receiver detection in PCI-Express devices
US Patent 7234013 System and method for preventing wake on LAN to protect expansion cards
US Patent 7237050 Multi-channel serial advanced technology attachment control system and control card thereof
US Patent 7237051 Mechanism to control hardware interrupt acknowledgement in a virtual machine system
US Patent 7240138 Data transfer control apparatus
US Patent 7251704 Store and forward switch device, system and method
US Patent RE39763 Isochronous channel having a linked list of buffers
US Patent 7254664 Express card interface adapter
US Patent 7260663 System and method for presenting interrupts
US Patent 7260666 Supporting multiple methods for device hotplug in a single computer
US Patent 7260667 Data transfer device, semiconductor integrated circuit, and microcomputer
US Patent 7263563 Multi-bus driver apparatus and method for driving a plurality of buses
US Patent 7263570 Method of providing an interface to a plurality of peripheral devices using bus adapter chips
US Patent 7266630 CPU contained LSI
US Patent 7266632 Programmable logic device including programmable interface core and central processing unit
US Patent RE39837 Method and apparatus for adjusting a power consumption level based on the amount of time a processor clock is stopped
US Patent 7269678 Interrupt request program and microcomputer
US Patent 7269680 System enabling device communication in an expanded computing device
US Patent 7275119 Early detection and grant, an arbitration scheme for single transfers on AMBA advanced high-performance bus
US Patent 7275122 Method and system for maintaining a desired service level for a processor receiving excessive interrupts
US Patent 7277974 Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanism
US Patent 7281069 Method and system for extending the functionality of an embedded USB transceiver interface to handle threshold shift of a USB 2.0 bus during high-speed chirp
US Patent 7281077 Elastic buffer module for PCI express devices
US Patent 7284139 Processor having real-time power conservation
US Patent 7290074 Back-off timing mechanism
US Patent 7293125 Dynamic reconfiguration of PCI express links
US Patent 7293129 Flexible routing and addressing
US Patent 7296108 Apparatus and method for efficient transmission of unaligned data
US Patent 7299311 Apparatus and method for arbitrating for a resource group with programmable weights
US Patent 7302508 Apparatus and method for high speed data transfer
US Patent 7302512 Interrupt steering in computing devices to effectuate peer-to-peer communications between device controllers and coprocessors
US Patent 7305503 Method and apparatus for controlling an external device using auto-play/auto-pause functions
US Patent 7305504 IEEE 1394-adopted host device and control method thereof
US Patent 7305505 Multiple removable non-volatile memory cards serially communicating with a host
US Patent 7308519 Communications bus management circuit
US Patent 7308523 Flow-splitting and buffering PCI express switch to reduce head-of-line blocking
US Patent 7310691 Network subscriber station for a network of distributed stations, and method for operating a network subscriber station
US Patent 7320040 Data distribution system
US Patent 7321948 Highly available system test mechanism
US Patent 7325080 Data collection system
US Patent 7334061 Burst-capable interface buses for device-to-device communications
US Patent 7337251 Information processing device with priority-based bus arbitration
US Patent 7337252 System and method for resolving conflicts of re-locking resources
US Patent 7340544 Method of using bus and bus interface
US Patent 7340554 USB host controller with DMA capability
US Patent 7343442 Scalable distributed memory and I/O multiprocessor systems and associated methods
US Patent 7346726 Integrated circuit with dynamic communication service selection
US Patent 7350011 Mobile device expansion system
US Patent 7353314 Time-out control apparatus, terminal unit, time-out control system and time-out procedure
US Patent 7353315 Bus controller with virtual bridge
US Patent RE40236 Software-based voltage detection to reserve device power upon shutdown
US Patent 7356633 Composing on-chip interconnects with configurable interfaces
US Patent 7356634 Device including serial interface
US Patent 7356636 Virtualized PCI switch
US Patent 7356637 Virtual IDE storage device with PCI express interface
US Patent 11181962 Portable storage devices and methods of operating portable storage devices
US Patent 11182326 Input/output apparatus and methods for monitoring and/or controlling dynamic environments
US Patent 11182329 Data processing system and operating method thereof
US Patent 7366810 Method and system for multi-processor arbitration
US Patent 7373450 Multi-layer bus system having a bus control circuit
US Patent 7376774 Network media access controller embedded in a programmable logic device—host interface control generator
US Patent 7376781 Virtual USB card reader with PCI express interface
US Patent 7380034 Method of arbitration for bus use request and system therefor
US Patent 7380040 Software programmable dynamic arbitration scheme
US Patent 7380045 Protocol conversion and arbitration circuit, system having the same, and method for converting and arbitrating signals
US Patent 7383370 Arbiter circuit and signal arbitration method
US Patent RE40378 Smart card which operates with the USB protocol
US Patent 7395363 Methods and apparatus for multiple bit rate serial communication
US Patent 7395364 Data transfer control apparatus
US Patent 7395365 Data transfer control system, electronic instrument, program, and data transfer control method
US Patent 7398346 Bus system for use with information processing apparatus
US Patent 7401171 Methods and structure for SAS expander initiating communication to a SAS initiator to identify changes in the SAS domain
US Patent 7404025 Software programmable dynamically reconfigurable scheme for controlling request grant and masking for ultra high priority accessor during arbitration
US Patent 7404026 Multi media card with high storage capacity
US Patent 7406557 Programmable logic device including programmable interface core and central processing unit
US Patent 7409476 System and method for USB controllers
US Patent 7412551 Methods and apparatus for supporting programmable burst management schemes on pipelined buses
US Patent 7415554 System and method for parallel data transmission
US Patent 7415558 Communication steering for use in a multi-master shared resource system
US Patent 7421528 Network media access controller embedded in a programmable logic device—address filter
US Patent 7421532 Switching with transparent and non-transparent ports
US Patent 7426592 Management function setting method for intelligent platform management interface
US Patent 7426601 Segmented interconnect for connecting multiple agents in a system
US Patent 7426602 Switch for bus optimization
US Patent 7430627 Adaptive reader-writer lock
US Patent 7433989 Arbitration method of a bus bridge
US Patent 7437496 Hot swap adapter
US Patent 7441061 Method and apparatus for inter-module communications of an optical network element
US Patent 7441064 Flexible width data protocol
US Patent 7444450 Method and system for detecting excessive interrupt processing for a processor
US Patent 7444452 Computer system with a PCI express interface
US Patent 7444456 SRAM bus architecture and interconnect to an FPGA
US Patent 7447819 Information processing apparatus and SMI processing method thereof
US Patent 7447821 U3 adapter
US Patent 7447822 Hot-plug control system and method
US Patent 7447824 Dynamic lane management system and method
US Patent 7447827 Multi-port bridge device
US Patent 7451250 Methods and apparatus for providing automatic high speed data connection in portable device
US Patent 7454552 Switch with transparent and non-transparent ports
US Patent 7457906 Method and apparatus for shared I/O in a load/store fabric
US Patent 7461192 Interface for bridging out-of-band information and preventing false presence detection of terminating devices
US Patent 7461193 Network media access controller embedded in a programmable logic device—receive-side client interface
US Patent 7461195 Method and system for dynamically adjusting data transfer rates in PCI-express devices
US Patent 7464206 Semiconductor device and method of connecting the same
US Patent 7464212 Method and apparatus for determining compatibility between devices
US Patent 7464213 Memory adapter and unit including independent radio circuit and removable memory store
US Patent 7464215 Cradle device, control method and computer program for controlling the attitude of an imaging device
US Patent 7467249 Efficient connection between modules of removable electronic circuit cards
US Patent 7469310 Network switch architecture for processing packets independent of media type of connected ports
US Patent 7475178 Hot-plug link apparatus and method using a direction line to indicate presence of a hot-plug device
US Patent 7478183 Method and system for n dimension arbitration algorithm—scalable to any number of end points
US Patent 7480753 Switching upstream and downstream logic between ports in a universal serial bus hub
US Patent 7480755 Trap mode register
US Patent 7480757 Method for dynamically allocating lanes to a plurality of PCI Express connectors
US Patent 7480758 Method and apparatus for automatically switching between USB host and device
US Patent 7484022 Network media access controller embedded in a programmable logic device—host interface
US Patent 7484025 PC card and PC card control method
US Patent 7484032 Fault tolerant computer system
US Patent 7487280 Enabling ports on a module received in a slot in a chassis
US Patent 7487282 Host-client utility meter systems and methods for communicating with the same
US Patent 7487284 Transaction flow and ordering for a packet processing engine, located within an input-output hub
US Patent RE40635 32 bit generic asynchronous bus interface using read/write strobe byte enables
US Patent 7490185 Data processing system, access control method, and access control device
US Patent 7493425 Method, system and program product for differentiating between virtual hosts on bus transactions and associating allowable memory access for an input/output adapter that supports virtualization
US Patent 7493435 Optimization of SMI handling and initialization
US Patent 7493438 Apparatus and method for enumeration of processors during hot-plug of a compute node
US Patent 7500037 System, method and program for managing locks
US Patent 7500038 Resource management
US Patent RE40660 Configurable glueless microprocessor interface
US Patent 7502881 Data packet routing mechanism utilizing the transaction ID tag field
US Patent 7504798 Wiper controller and method for controlling wiper
US Patent 7506086 Electronic network with identification code generation and assignment
US Patent 7506088 Method and apparatus for supporting and presenting multiple serial bus nodes using distinct configuration ROM images
US Patent 7506092 Bridge card for converting a bus connection of a parallel daughter card mounted thereon to a different bus connection of a mother board
US Patent 7509446 IIC bus communication system capable of suppressing freeze of IIC bus communication due to a noise and method for controlling IIC bus communication
US Patent 7509448 Systems and methods for managing semantic locks
US Patent 7512730 Method for dynamically allocating interrupt pins
US Patent 7516257 Mechanism to handle uncorrectable write data errors
US Patent 7519751 Method of generating an enable signal of a standard memory core and relative memory device
US Patent 7523240 Interrupt controller and interrupt control method
US Patent 7526595 Data path master/slave data processing device apparatus and method
US Patent 7529874 Semiconductor integrated circuit device for real-time processing
US Patent 7533203 Method and system for rapidly starting up an IEEE 1394 network
US Patent 7533204 Enumeration of devices on a memory channel
US Patent 7533207 Optimized interrupt delivery in a virtualized environment
US Patent 7533209 Universal serial bus circuit which detects connection status to a USB host
US Patent 7533211 Cross-bar switching in an emulation environment
US Patent 7536497 Device and method for performing multi-function using unique port in wireless terminal
US Patent 7539785 Network device manager
US Patent 7539801 Computing device with flexibly configurable expansion slots, and method of operation
US Patent 7539802 Integrated circuit device and signaling method with phase control based on information in external memory device
US Patent 7543100 Node controller for a data storage system
US Patent 7546390 Integrated circuit device and signaling method with topographic dependent equalization coefficient
US Patent 7546404 Method and apparatus for arbitration in a wireless device
US Patent 7549009 High-speed PCI interface system and a reset method thereof
US Patent 7552258 Method and system for extending the functionality of an embedded USB transceiver interface to handle threshold shift of a USB 2.0 bus during high-speed chirp
US Patent 7552260 Method for dynamically arranging interrupt pins
US Patent 7552265 System and method for providing context information
US Patent 7552269 Synchronizing a plurality of processors
US Patent 7555583 Control system having main controller and peripheral controllers, and bus connection method
US Patent 7562172 I2C Slave/master interface enhancement using state machines
US Patent 7565468 Integrated circuit memory device and signaling method for adjusting drive strength based on topography of integrated circuit devices
US Patent 7568062 Data cut-through in an infiniband/fibre channel bridge
US Patent 7571272 Infiniband/fibre channel bridge architecture
US Patent 7577781 Bus system for use with information processing apparatus
US Patent 7581051 Method for delivering interrupts to user mode drivers
US Patent 7587539 Methods of inter-integrated circuit addressing and devices for performing the same
US Patent 7587541 Master-slave device communication circuit
US Patent 7590782 Multiple removable non-volatile memory cards serially communicating with a host
US Patent 7590788 Controlling transmission on an asynchronous bus
US Patent 7590789 Optimizing clock crossing and data path latency
US Patent 7594059 Multi-interfaced accessory device for use with host computing systems
US Patent 7594061 Motherboard with multiple graphics interfaces
US Patent 7603508 Scalable distributed memory and I/O multiprocessor systems and associated methods
US Patent 7606959 Multiprocessor system using stacked processor modules and board to board connectors
US Patent 7606964 Virtual USB flash memory storage device with PCI express interface, controller and method thereof
US Patent 7610424 Arbitration device for arbitrating among a plurality of master devices, arbitration method, and video processing device including the arbitration device
US Patent 7624215 Interrupt controller
US Patent 7624220 Multisectional bus in radio base station and method of using such a radio base station
US Patent 7627707 Microscope system and extension unit
US Patent 7627709 Computer bus power consuming device
US Patent 7631129 Computer monitoring system and monitoring method
US Patent 7631133 Backplane interconnection system and method
US Patent 7631137 Data processing system and method for converting and synchronising data traffic
US Patent 7636806 Electronic system and method for sending or receiving a signal
US Patent 7647435 Data communication method and apparatus utilizing credit-based data transfer protocol and credit loss detection mechanism
US Patent 7650448 I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures
US Patent 7650453 Information processing apparatus having multiple processing units sharing multiple resources
US Patent 7653773 Dynamically balancing bus bandwidth
US Patent 7657683 Cross-thread interrupt controller for a multi-thread processor
US Patent 7657688 Dynamically allocating lanes to a plurality of PCI express connectors
US Patent 7657692 High-level bridge from PCIE to extended USB
US Patent 7660932 Composing on-chip interconnects with configurable interfaces
US Patent 7660938 Flash card reader and data exchanger utilizing low power extended USB protocol without polling
US Patent 7664904 High speed serial switch fabric performing mapping of traffic classes onto virtual channels
US Patent 7668995 IIC bus communication system capable of suppressing freeze of IIC bus communication and method for controlling IIC bus communication
US Patent 7673084 Bus system and methods of operation using a combined data and synchronization line to communicate between bus master and slaves
US Patent 7673085 Multi-channel communication circuit
US Patent 7673091 Method to hide or reduce access latency of a slow peripheral in a pipelined direct memory access system
US Patent 7673092 PCI Express interface
US Patent 7685325 Synchronous bus controller system
US Patent 7685343 Data access method for serial bus
US Patent 7685351 External device access apparatus
US Patent 7698485 Round-robin bus protocol
US Patent 7707340 Bus system and method of burst cycle conversion
US Patent 7707344 Interrupt mitigation on multiple network adapters
US Patent 7711888 Systems and methods for improving data transfer between devices
US Patent 7716401 Memory module capable of improving the integrity of signals transmitted through a data bus and a command/address bus, and a memory system including the same
US Patent 7721037 Device for controlling point-to-point communication between a module and transmission bus
US Patent 7725633 Arbitration device for arbitrating among a plurality of master devices, arbitration method, and video processing device including the arbitration device
US Patent 7725634 Microprocessor device and related method for a liquid crystal display controller
US Patent 7725636 Trigger core
US Patent 7725639 Switch architecture independent of media
US Patent 7725640 Adapter card replay buffer for system fault analysis
US Patent 7734853 Latency dependent data bus transmission
US Patent 7734859 Virtualization of a host computer's native I/O system architecture via the internet and LANs
US Patent 7752369 Bounded starvation checking of an arbiter using formal verification
US Patent 7757027 Control of master/slave communication within an integrated circuit
US Patent 7765355 Detecting circuit for IEEE 1394 device
US Patent 7765358 Connecting multiple peripheral interfaces into one attachment point
US Patent 7769935 Communication system with master and slave exchanging control data in predetermined communication period
US Patent RE41494 Extended cardbus/PC card controller with split-bridge technology
US Patent 7779190 Arbitration device for arbitrating among a plurality of master devices, arbitration method, and video processing device including the arbitration device
US Patent 7779191 Platform-based idle-time processing
US Patent 7779194 Data modification module
US Patent 7783818 Modularized interconnect between root complexes and I/O modules
US Patent 7788430 Enhanced single-node protocol for data, address and control operations
US Patent 7788432 System for performing a serial communication between a central control block and satellite components
US Patent 7793024 Method for utilizing a PCI-Express bus to communicate between system chips
US Patent 7793026 Computer system with peripheral modules attached to a display/CPU assembly
US Patent 7797476 Flexible connection scheme between multiple masters and slaves
US Patent 7802045 Bus system for use with information processing apparatus
US Patent 7802047 Universal serial bus device and universal serial bus system including the same
US Patent 7814259 PCI express switch with backwards compatibility
US Patent RE41849 Parallel multi-threaded processing
US Patent 7818484 Multimedia data communication method and system
US Patent 7827341 Navigation system and method of forming a navigation system
US Patent 7836233 Multi-processor system
US Patent 7840734 Simple bus buffer
US Patent 7840739 UPNP control point and method of handling UPNP control request
US Patent 7844770 Hub structure for enabling communication with a large number of handheld electronic devices
US Patent 7849246 I2C bus control circuit
US Patent 7849252 Providing a prefix for a packet header
US Patent 7861023 Multiuser KVM switch
US Patent 7861024 Providing a set aside mechanism for posted interrupt transactions
US Patent 7865645 Bus arbiter, bus device and system for granting successive requests by a master without rearbitration
US Patent 7865649 Module for reproducing a transmitter signal
US Patent 7865653 Universal serial bus host controller and control methods thereof
US Patent 7882298 Method for transmitting data from and to a control device
US Patent 7895377 Multiple removable non-volatile memory cards serially communicating with a host
US Patent 7895379 Logic controller having hard-coded control logic and programmable override control store entries
US Patent 7895386 USB interface provided with host/device function and its control method
US Patent 7899961 Multi-mode bus inversion method and apparatus
US Patent 7899962 I/O and memory bus system for DFPs and units with two- or multi-dimensional programmable cell architectures
US Patent 7904627 Passive client-host detection for connected peripherals
US Patent 7904630 Bus-connected device with platform-neutral layers
US Patent 7913025 Method and system for a storage device
US Patent 7913028 Data processing system having multiplexed data relaying devices, data processing aparatus having multiplexed data relaying devices, and a method of incorporating data relaying devices in data processing system having multiplexed data relaying devices
US Patent 7917683 Method and system for utilizing multiple storage devices
US Patent 7921254 Wireless universal serial bus system and driving method thereof
US Patent 7925811 Electropneumatic module system composed of individual modules put in a row
US Patent 7930461 Interface circuit
US Patent 7930464 Scalable memory and I/O multiprocessor systems
US Patent 7934029 Data transfer between devices within an integrated circuit
US Patent 7934043 Data processing apparatus for controlling access to a memory based upon detection of completion of a DMA bus cycle
US Patent 7941583 Controlled frequency core processor and method for starting-up said core processor in a programmed manner
US Patent 7941584 Data processing apparatus and method for performing hazard detection
US Patent 7945722 Routing data units between different address domains
US Patent RE42397 Architecture for a universal serial bus-based PC flash disk
US Patent RE42443 Architecture for a universal serial bus-based PC flash disk
US Patent 7958378 Power supply device having load detection function and communication apparatus provided with the power supply device
US Patent 7962678 Bus arbitration apparatus and method
US Patent 7970978 SSD with SATA and USB interfaces
US Patent 7971084 Power management in electronic systems
US Patent 7975157 Host device with power-saving function
US Patent 7991934 Multiprocessor method and system using stacked processor modules and board-to-board connectors
US Patent 8001305 System and dynamic random access memory device having a receiver
US Patent 8006012 Data storage system
US Patent 8006024 Multi-port system and method for routing a data element within an interconnection fabric
US Patent 8006026 Multi-port memory and computer system provided with the same
US Patent 8010724 12C/SMBus ladders and ladder enabled ICs
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Golden AI
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US Patent 8010724 12C/SMBus ladders and ladder enabled ICs
Golden AI
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US Patent 8006026 Multi-port memory and computer system provided with the same
Golden AI
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US Patent 8006024 Multi-port system and method for routing a data element within an interconnection fabric
Golden AI
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US Patent 8006012 Data storage system
Golden AI
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US Patent 8001305 System and dynamic random access memory device having a receiver
Golden AI
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Patent primary examiner of
US Patent 7991934 Multiprocessor method and system using stacked processor modules and board-to-board connectors
Edits on 8 Dec, 2021
Golden AI
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US Patent 7975157 Host device with power-saving function
Golden AI
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US Patent 7971084 Power management in electronic systems
Golden AI
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US Patent 7970978 SSD with SATA and USB interfaces
Golden AI
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Patent primary examiner of
US Patent 7962678 Bus arbitration apparatus and method
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7958378 Power supply device having load detection function and communication apparatus provided with the power supply device
Golden AI
edited on 7 Dec, 2021
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US Patent RE42443 Architecture for a universal serial bus-based PC flash disk
Golden AI
edited on 7 Dec, 2021
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US Patent RE42397 Architecture for a universal serial bus-based PC flash disk
Golden AI
edited on 7 Dec, 2021
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US Patent 7945722 Routing data units between different address domains
Golden AI
edited on 7 Dec, 2021
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US Patent 7941584 Data processing apparatus and method for performing hazard detection
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7941583 Controlled frequency core processor and method for starting-up said core processor in a programmed manner
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7934043 Data processing apparatus for controlling access to a memory based upon detection of completion of a DMA bus cycle
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7934029 Data transfer between devices within an integrated circuit
Golden AI
edited on 7 Dec, 2021
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Patent primary examiner of
US Patent 7930464 Scalable memory and I/O multiprocessor systems
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