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US Patent 8028144 Memory module with reduced access granularity

Patent 8028144 was granted and assigned to Rambus on September, 2011 by the United States Patent and Trademark Office.

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent
1

Patent attributes

Current Assignee
Rambus
Rambus
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
80281441
Patent Inventor Names
Frederick A. Ware1
Craig E. Hampel1
Date of Patent
September 27, 2011
1
Patent Application Number
123920711
Date Filed
February 24, 2009
1
Patent Citations Received
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US Patent 11782863 Memory module with configurable command buffer
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US Patent 11907555 High performance, high capacity memory modules and systems
2
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US Patent 11868172 Register clock driver with chip select loopback
3
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US Patent 11755507 Memory module threading with staggered data transfers
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US Patent 11803328 Memory with variable access granularity
Patent Primary Examiner
‌
Tuan Thai
1
Patent abstract

A memory module having reduced access granularity. The memory module includes a substrate having signal lines thereon that form a control path and first and second data paths, and further includes first and second memory devices coupled in common to the control path and coupled respectively to the first and second data paths. The first and second memory devices include control circuitry to receive respective first and second memory access commands via the control path and to effect concurrent data transfer on the first and second data paths in response to the first and second memory access commands.

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