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US Patent 7660183 Low power memory device

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7660183
Date of Patent
February 9, 2010
Patent Application Number
11194812
Date Filed
August 1, 2005
Patent Citations Received
‌
US Patent 11948619 Protocol for memory power-mode control
3
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US Patent 11782863 Memory module with configurable command buffer
‌
US Patent 11803328 Memory with variable access granularity
‌
US Patent 11804250 Memory with deferred fractional row activation
Patent Primary Examiner
‌
Hoai V Ho
Patent abstract

In a memory device having a memory core and a signal interface, receiving a command that specifies at least a portion of a memory access. During the memory access, transferring data between the memory core and the signaling interface, and transferring the data between the signaling interface and an external signal path, and prior to transferring the data between the signaling interface and the external signal path, receiving enable information to selectively enable at least a first memory resource and a second memory resource, wherein each of the first memory resource and the second memory resource performs a control function associated with the memory access.

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