US Patent 7657725 Integrated circuit with memory-less page table
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Patent abstract
A system is disclosed that comprises a processor, a memoryless first level page table addressable by the processor, and a second level page table stored in a memory coupled to the processor. The second level page table is addressable by at least one entry of the first level page table.
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Patent Inventor Names
David Cureton Baker0
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US Patent 07657725 Integrated circuit with memory-less page table US Patent 7657725 Integrated circuit with memory-less page table
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Patent Number
076577250
Patent Number
76577250
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Official Website
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Patent Jurisdiction
Patent Number
076577250
Date of Patent
February 2, 2010
0Patent Application Number
111665030
Date Filed
June 24, 2005
0Official Website
Patent Primary Examiner
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US Patent 07657725 Integrated circuit with memory-less page table
Infobox
Is a
Patent jurisdiction
Patent number
07657725
Date of patent
February 2, 2010
Patent application number
11166503
Date Filed
June 24, 2005
Patent primary examiner
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