US Patent 7599247 Memory and method of writing data

Semiconductor memory devices 10 are each furnished with a memory array 100 having an EEPROM array 101 and a mask ROM array 102. Identifying information for identifying each semiconductor memory device 10 is stored at the beginning three addresses of the EEPROM array 101. 8-bit data relating to ink level is stored at the ninth address to sixteenth address of the EEPROM array 101. The seventeenth address to the twenty-fourth address of the EEPROM array 101 is provided with a usage history information storage area for storing 8-bit usage history information that is rewriteable under certain conditions.