Is a
Patent attributes
Patent Jurisdiction
Patent Number
Patent Inventor Names
Mou-Shiung Lin0
Date of Patent
November 25, 2008
Patent Application Number
11930191
Date Filed
October 31, 2007
Patent Primary Examiner
Patent abstract
A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within a larger circuit environment at a minimum cost in electrical circuit performance.
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