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US Patent 7420247 Power LDMOS transistor

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Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
7420247
Date of Patent
September 2, 2008
Patent Application Number
11202981
Date Filed
August 12, 2005
Patent Citations Received
‌
US Patent 11996479 Laterally diffused MOSFET and method of fabricating the same
3
‌
US Patent 11699752 Laterally diffused MOSFET and method of fabricating the same
4
‌
US Patent 11791377 Power device integration on a common substrate
Patent Primary Examiner
‌
Edward Wojciechowicz
Patent abstract

A LDMOS transistor comprises a trench formed through the epitaxial layer at least to the top surface of the substrate, the trench having a bottom surface and a sidewall contacting the source region and the portion of the channel region extending under the source region. A first insulating layer is formed over the upper surface and sidewall surfaces of the conductive gate. A continuous layer of conductive material forming a source contact and a gate shield electrode is formed along the bottom surface and the sidewall of the trench and over the first insulating layer to cover the top and sidewall surfaces of the conductive gate. A second insulating layer is formed over an active area of the transistor, including over the continuous layer of conductive material and filling the trench. A drain electrode can extend over the second insulating layer to substantially cover the active area.

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