US Patent 7313021 Nonvolatile memory circuit

A nonvolatile memory circuit includes a flip-flop to degrade an internal circuit irreversibly based on a voltage applied to a first or second bit line so as to latch data in a nonvolatile manner, a first switch coupled between a first output terminal of the flip-flop and the first bit line, a second switch coupled between the first output terminal of the flip-flop and the first bit line, a third switch coupled between a second output terminal of the flip-flop outputting an inverse of an output of the first output terminal and the second bit line, and a fourth switch coupled between the second output terminal of the flip-flop and the second bit line.