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US Patent 7310115 Imaging device with boosting circuit

Patent 7310115 was granted and assigned to Sanyo on December, 2007 by the United States Patent and Trademark Office.

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent
1

Patent attributes

Current Assignee
Sanyo
Sanyo
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
73101151
Patent Inventor Names
Takashi Tanimoto1
Date of Patent
December 18, 2007
1
Patent Application Number
104021931
Date Filed
March 28, 2003
1
Patent Citations Received
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US Patent 12127095 Custom content for premises management
2
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US Patent 11943301 Media content management
3
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US Patent 11962672 Virtual device systems and methods
4
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US Patent 12088425 Bidirectional security sensor communication for a premises security system
5
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US Patent 12120171 Methods and systems for data communication
6
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US Patent 11656667 Integrated security system with parallel processing architecture
7
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US Patent 11665617 Server-based notification of alarm event subsequent to communication failure with armed security system
8
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US Patent 11663902 Method and system for providing alternate network access
9
...
Patent Primary Examiner
Lin Ye
Lin Ye
1
Patent abstract

An imaging device that is activated quickly and prevents deterioration of an image signal. The imaging device includes a boosting circuit for boosting an input voltage to generate a boosted voltage. A solid state imaging device receives the boosted voltage and generates the image signal. A clock signal generation unit is connected to the boosting circuit to determine a timing for generating the image signal in correspondence with a vertical synchronization signal and a horizontal synchronization signal and to generate a boosting clock signal for operating the boosting circuit. The clock signal generation unit continuously generates the boosting clock signal during a predetermined period in which the imaging operation starts and, after the predetermined period, generates the boosting clock signal during at least part of a blanking period of the vertical synchronization signal and the horizontal synchronization signal.

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