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US Patent 12068745 Multi-bit scan chain with error-bit generator

Patent 12068745 was granted and assigned to ARM (Asset & Resource Management Holding Company) on August, 2024 by the United States Patent and Trademark Office.

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent
1

Patent attributes

Patent Applicant
ARM (Asset & Resource Management Holding Company)
ARM (Asset & Resource Management Holding Company)
1
Current Assignee
ARM (Asset & Resource Management Holding Company)
ARM (Asset & Resource Management Holding Company)
1
Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
1
Patent Number
120687451
Patent Inventor Names
Anil Kumar Baratam1
Yves Thomas Laplanche1
Date of Patent
August 20, 2024
1
Patent Application Number
174625241
Date Filed
August 31, 2021
1
Patent Citations
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US Patent 9366725 Multiplexer circuit
1
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US Patent 9444496 Correctable parity protected memory
1
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US Patent 9543016 Low power high speed program method for multi-time programmable memory device
1
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US Patent 9720438 Clock switch device and system-on-chip having the same
1
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US Patent 9748956 Integrated circuit and storage device including the same
1
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US Patent 10204674 Activation of memory core circuits in an integrated circuit
1
‌
US Patent 10587253 Ring oscillator-based programmable delay line
1
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US Patent 10600458 Memory device and method of operating the same for latency control
1
...
Patent Primary Examiner
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Melvin H Pollack
1
CPC Code
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H03K 19/1737
1
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H03K 19/096
1
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H03K 19/0075
1
Patent abstract

Various implementations described herein are directed to a device having a scan chain that receives a multi-bit input, provides a multi-bit output, and provides a multi-bit multiplexer output based on the multi-bit input and the multi-bit output. The device may have an error-bit generator that receives the multi-bit multiplexer output, receives a portion of the multi-bit input, receives a portion of the multi-bit output, and provides an error-bit output based on the multi-bit multiplexer output, the portion of the multi-bit input, and the portion of the multi-bit output.

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