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US Patent 11777034 Hybrid complementary field effect transistor device

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Patent abstractTimelineTable: Further ResourcesReferences
Is a
Patent
Patent

Patent attributes

Patent Jurisdiction
United States Patent and Trademark Office
United States Patent and Trademark Office
Patent Number
11777034
Patent Inventor Names
Chen Zhang
Ruilong Xie
Junli Wang
Jingyun Zhang
Pietro Montanini
Date of Patent
October 3, 2023
Patent Application Number
17468001
Date Filed
September 7, 2021
Patent Citations
‌
US Patent 10236217 Stacked field-effect transistors (FETs) with shared and non-shared gates
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US Patent 10262890 Method of forming silicon hardmask
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US Patent 10297667 Fin field-effect transistor for input/output device integrated with nanosheet field-effect transistor
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US Patent 10381438 Vertically stacked NFETS and PFETS with gate-all-around structure
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US Patent 10332803 Hybrid gate-all-around (GAA) field effect transistor (FET) structure and method of forming
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US Patent 11362096 Semiconductor device structure and method for forming the same
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US Patent 9356027 Dual work function integration for stacked FinFET
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US Patent 10002795 Method and structure for forming vertical transistors with shared gates and separate gates
Patent Primary Examiner
‌
Earl N Taylor
CPC Code
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H01L 29/4238
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H01L 29/42392
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H01L 29/66439
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H01L 29/66545
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H01L 29/66795
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H01L 29/775
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H01L 29/785
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H01L 29/78696
...
Patent abstract

A stacked transistor device is provided. The stacked transistor device includes a nanosheet transistor device on a substrate; and a fin field effect transistor device over the nanosheet transistor device to form the stacked transistor device, wherein the fin field effect transistor device is configured to have a current flow through the fin field effect transistor device perpendicular to a current flow through the nanosheet transistor device.

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