Heterostructured technology

When sunlight hits the p-n junction connected to the consumer, a current flows through the electrical circuit - the solar cell generates electricity.

The key advantages of heterojunction technology are: high efficiency and stability of parameters, which ensures high quality of the final product.

This is achieved due to a number of technological features in production, namely:

Sputtering of doped layers of amorphous silicon improves efficiency at extremely high and low temperatures, as well as in low-light conditions.

Passivation of the back surface reduces recombination (transition losses), which in turn provides increased no-load voltage and lower temperature coefficient.

The use of antireflection coatings reduces surface reflection from 30 to 10%.

A special high permeability glass is used.

The metal contacts on the surface are as close together as possible to minimize transverse resistive losses and at the same time are very thin to reduce the shaded surface area.

This achieves:

Up to 10%* increased production per square meter of area due to the low temperature coefficient

up to 13%* better space utilization and component cost savings

Up to 21%* higher cumulative throughput over the module's lifetime due to low degradation

*Compared to mono-silicon modules of similar capacity

Starting wafers of crystalline silicon arrive at the incoming inspection area.

Wafers are sorted by type of defect and sorted by type of defect. Good silicon wafers are automatically loaded into cassettes and transported to the chemical treatment area.

The first operation in this area is chemical treatment - removing the damaged layer when cutting wafers. The next task is to create a textured wafer surface to maximize absorption of incident light. A pyramidal light-absorbing texture is formed on the surface of a monocrystalline silicon wafer by selective anisotropic (slow) etching. The process takes place in special baths with alkali solution at 850 C.

Then thin nanosized layers (films) of amorphous hydrogenated silicon are synthesized (deposited) on the prepared wafers of monocrystalline silicon (on the face and back sides) in KAI installations using plasma chemical deposition technology.

Creation of heterojunctions on both sides of a monocrystalline silicon wafer occurs in several stages: automation line feeds cassettes with prepared wafers into KAI units of the first deposition, where amorphous silicon is applied to the front side of the wafer, after operation, automatically, through zone ISO 7 wafers return to automation area, turn over and are directed to KAI of the second deposition for application of films on the back side.

After the heterostructure is created, the cells are fed to the section for forming the anti-reflective and metallic contact layers. Here they are coated with layers of ITO - indium tin oxide and other films, after which the wafers acquire shades of blue and purple.

Next, the wafers are screen printed with a current collector grid, which ensures the efficient collection and transfer of the electric energy generated by the solar cell.

The current-carrying mesh is formed by pushing silver-containing paste through the mesh stencil and the subsequent process of heat treatment (embedding) at a temperature of about 2000C.

Photoelectric transducers production process is completed by performance measurement and sorting area. Here all electrophysical characteristics of solar cells are measured: current, voltage, power, etc., and sorted by parameters.