Salience Labs

Salience Labs is a company developing a high-speed multi-chip processor combining photonics and electronics to accelerate advances in AI. The company's technology aims to accelerate AI advances through a new computing paradigm that is faster and highly application-specific. Salience Labs uses a proprietary amplitude-based approach to photonics, producing dense computing chips clocking at 10s of GHz. By combining this with parallel performance, Salience Labs believes it will enable exascale computing in new and existing AI processes and applications. Salience Labs states its technology is capable of stacking up to 64 vectors into a beam of light. Using a broad bandwidth of light to execute operations, Salience Labs delivers massively parallel processing performance within a given power envelope.

Salience Labs leverages a multi-chip design, with the photonic processing mapping directly on top of the Static Random Access Memory (SRAM). This novel "on-memory compute" architecture can be adapted to the application-specific requirements of different market verticals, for example, AI use cases in communications, robotics, vision systems, healthcare, and other data workloads. The company's technology is designed for volume manufacture, fabricating with production-level foundries using standard CMOS processes.

Spun out from the University of Oxford and the University of Münster in 2021, Salience Labs was founded by Vaysh Kewada (CEO), Dr. Johannes Feldmann (CTO), Prof. Wolfram Pernice, and Prof. Harish Bhaskaran. The company was founded to commercialize technology developed at the University of Oxford and the University of Münster. On May 12, 2022, Salience Labs raised a seed round of $11.5 million. The round was led by Cambridge Innovation Capital and Oxford Science Enterprises, with Oxford Investment Consultants, Jalal Bagherli (former CEO of Dialog Semiconductor), Silicon Catalyst, the Goh Family Office from Singapore, and Deeptech Labs also participating. Headquartered in Oxford, Salience Labs has built a team of physicists, engineers, and computer scientists to build a new type of chip.