List of software composition analysis patents

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Software composition analysis

Name	Description	Patent Applicant	Current Assignee	Patent Jurisdiction	Patent Number	Date of Patent
‌ US Patent 10223533 Systems and methods for analysis of cross-site scripting vulnerabilities	Patent 10223533 was granted and assigned to Veracode on March, 2019 by the United States Patent and Trademark Office.	Veracode	Veracode	United States Patent and Trademark Office	10223533	March 5, 2019
‌ US Patent 7263122 Receiver based decision feedback equalization circuitry and techniques	Patent 7263122 was granted and assigned to Synopsys on August, 2007 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7263122	August 28, 2007
‌ US Patent 11415897 Calibrating stochastic signals in compact modeling	Patent 11415897 was granted and assigned to Synopsys on August, 2022 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	11415897	August 16, 2022
‌ US Patent 11556689 Layout of photonic integrated circuits using fixed coordinate grids	Patent 11556689 was granted and assigned to Synopsys on January, 2023 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	11556689	January 17, 2023
‌ US Patent 11644746 Inverse etch model for mask synthesis	Patent 11644746 was granted and assigned to Synopsys on May, 2023 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	11644746	May 9, 2023
‌ US Patent 7436008 Power and ground shield mesh to remove both capacitive and inductive signal coupling effects of routing in integrated circuit device	Patent 7436008 was granted and assigned to Synopsys on October, 2008 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7436008	October 14, 2008
‌ US Patent 7523027 Visual inspection and verification system	Patent 7523027 was granted and assigned to Synopsys on April, 2009 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7523027	April 21, 2009
‌ US Patent 10915683 Methodology to create constraints and leverage formal coverage analyzer to achieve faster code coverage closure for an electronic structure	Patent 10915683 was granted and assigned to Synopsys on February, 2021 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	10915683	February 9, 2021
‌ US Patent 11507719 Accelerating formal property verification across design versions using sequential equivalence checking	Patent 11507719 was granted and assigned to Synopsys on November, 2022 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	11507719	November 22, 2022
‌ US Patent 7260807 Method and apparatus for designing an integrated circuit using a mask-programmable fabric	Patent 7260807 was granted and assigned to Synopsys on August, 2007 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7260807	August 21, 2007
‌ US Patent 7356788 Method and apparatus for data hierarchy maintenance in a system for mask description	Patent 7356788 was granted and assigned to Synopsys on April, 2008 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7356788	April 8, 2008
‌ US Patent 7386053 System and method of equalization of high speed signals	Patent 7386053 was granted and assigned to Synopsys on June, 2008 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7386053	June 10, 2008
‌ US Patent 7545860 System and method of equalization of high speed signals	Patent 7545860 was granted and assigned to Synopsys on June, 2009 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7545860	June 9, 2009
‌ US Patent 7169515 Phase conflict resolution for photolithographic masks	Patent 7169515 was granted and assigned to Synopsys on January, 2007 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7169515	January 30, 2007
‌ US Patent 6988253 Methods, apparatus and computer program products that perform layout versus schematic comparison of integrated circuits using advanced pin coloring operations	Patent 6988253 was granted and assigned to Synopsys on January, 2006 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	6988253	January 17, 2006
‌ US Patent 8478950 Data processing circuit with arbitration between a plurality of queues	Patent 8478950 was granted and assigned to Synopsys on July, 2013 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	8478950	July 2, 2013
‌ US Patent 7454731 Generation of engineering change order (ECO) constraints for use in selecting ECO repair techniques	Patent 7454731 was granted and assigned to Synopsys on November, 2008 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7454731	November 18, 2008
‌ US Patent 7594213 Method and apparatus for computing dummy feature density for chemical-mechanical polishing	Patent 7594213 was granted and assigned to Synopsys on September, 2009 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7594213	September 22, 2009
‌ US Patent 11314171 Lithography improvement based on defect probability distributions and critical dimension variations	Patent 11314171 was granted and assigned to Synopsys on April, 2022 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	11314171	April 26, 2022
‌ US Patent 7605449 Enhanced segmented channel MOS transistor with high-permittivity dielectric isolation material	Patent 7605449 was granted and assigned to Synopsys on October, 2009 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7605449	October 20, 2009
‌ US Patent 11403454 Placement and simulation of cell in proximity to cell with diffusion break	Patent 11403454 was granted and assigned to Synopsys on August, 2022 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	11403454	August 2, 2022
‌ US Patent 10885258 Fixing ESD path resistance errors in circuit design layout	Patent 10885258 was granted and assigned to Synopsys on January, 2021 by the United States Patent and Trademark Office.	Synopsys	Synopsys	United States Patent and Trademark Office	10885258	January 5, 2021
‌ US Patent 9672355 Automated behavioral and static analysis using an instrumented sandbox and machine learning classification for mobile security	Patent 9672355 was granted and assigned to Veracode on June, 2017 by the United States Patent and Trademark Office.		Veracode	United States Patent and Trademark Office	9672355	June 6, 2017
‌ US Patent 7130783 Simulation-based functional verification of microcircuit designs	Patent 7130783 was granted and assigned to Synopsys on October, 2006 by the United States Patent and Trademark Office.		Synopsys	United States Patent and Trademark Office	7130783	October 31, 2006
‌ US Patent 11334705 Electrical circuit design using cells with metal lines		Synopsys	Synopsys	United States Patent and Trademark Office	11334705	May 17, 2022

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