List of OptimalTest patents

List of OptimalTest patents

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List of Aureon Laboratories patents

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Patents where

Current Assignee

Name

is

‌

OptimalTest

	Name	Description	Patent Applicant	Current Assignee	Inventor	Patent Jurisdiction	Patent Number	Date of Patent
	‌ US Patent 7208969 Optimize parallel testing	Patent 7208969 was granted and assigned to OptimalTest on April, 2007 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7208969	April 24, 2007
	‌ US Patent 8112249 System and methods for parametric test time reduction	Patent 8112249 was granted and assigned to OptimalTest on February, 2012 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	8112249	February 7, 2012
	‌ US Patent 7969174 Systems and methods for test time outlier detection and correction in integrated circuit testing	Patent 7969174 was granted and assigned to OptimalTest on June, 2011 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7969174	June 28, 2011
	‌ US Patent 8421494 Systems and methods for test time outlier detection and correction in integrated circuit testing	Patent 8421494 was granted and assigned to OptimalTest on April, 2013 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	8421494	April 16, 2013
	‌ US Patent 7737716 Methods and systems for semiconductor testing using reference dice	Patent 7737716 was granted and assigned to OptimalTest on June, 2010 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7737716	June 15, 2010
	‌ US Patent 7679392 Methods and systems for semiconductor testing using reference dice	Patent 7679392 was granted and assigned to OptimalTest on March, 2010 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7679392	March 16, 2010
	‌ US Patent 7567947 Methods and systems for semiconductor testing using a testing scenario language	Patent 7567947 was granted and assigned to OptimalTest on July, 2009 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7567947	July 28, 2009
	‌ US Patent 8069130 Methods and systems for semiconductor testing using a testing scenario language	Patent 8069130 was granted and assigned to OptimalTest on November, 2011 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	8069130	November 29, 2011
	‌ US Patent 7777515 Methods and systems for semiconductor testing using reference dice	Patent 7777515 was granted and assigned to OptimalTest on August, 2010 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7777515	August 17, 2010
	‌ US Patent 7340359 Augmenting semiconductor's devices quality and reliability	Patent 7340359 was granted and assigned to OptimalTest on March, 2008 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7340359	March 4, 2008
	‌ US Patent 7532024 Methods and systems for semiconductor testing using reference dice	Patent 7532024 was granted and assigned to OptimalTest on May, 2009 by the United States Patent and Trademark Office.		‌ OptimalTest		United States Patent and Trademark Office	7532024	May 12, 2009

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